Binary basics
Half adder and full adder
How XOR and AND gates add bits, how a full adder handles the carry, and how a chain of them adds whole numbers.
You want to know how a chip adds two numbers when all it has are logic gates. It starts with a half adder. This circuit takes two bits, A and B, and gives a sum bit and a carry bit: the sum is A XOR B and the carry is A AND B. So 1 + 1 gives sum 0 and carry 1, which is 10 in binary. A full adder does the same job for three bits, A, B and the carry coming in from the column to its right. Chain one full adder per bit and the circuit adds whole binary numbers. The adder inside a processor is built on that same full-adder step.
Key takeaways
| A half adder adds two bits: Sum = A XOR B and Carry = A AND B. | |
| A full adder adds three bits, A, B and a carry in, and gives a sum and a carry out. | |
| A full adder is two half adders plus an OR gate, or nine NAND gates. | |
| Chaining one full adder per bit makes a ripple carry adder that adds whole numbers. | |
| Inverting B and setting the first carry in to 1 turns the adder into a subtractor. |
Try a full adder and a 4-bit adder
Switch A, B and the carry in on and off to see the full adder's outputs. Below it, enter two numbers from 0 to 15 to watch the carries ripple through four full adders.
Half adder
Adding two bits has four cases. The sum digit is 1 when exactly one input is 1, which is the XOR rule. The carry is 1 only when both inputs are 1, which is the AND rule. So a half adder is one XOR gate and one AND gate sharing the same two inputs.
| A | B | Sum (A XOR B) | Carry (A AND B) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Written as Boolean expressions, Sum = A ⊕ B and Carry = A · B, where ⊕ means XOR and the dot means AND. It's only half an adder because it works for the rightmost column of a sum and nowhere else. Every other column also has to add the carry coming in from its right, and a half adder has no input for that carry. The logic gates guide covers XOR and AND in detail.
Full adder
A full adder has three inputs: A, B and Cin, the carry in from the column to its right. It adds them and outputs Sum and Cout, the carry out to the column on its left. For example, 1 + 1 + 1 is 3, which is 11 in binary, so Sum is 1 and Cout is 1. With three inputs there are eight cases:
| A | B | Cin | Sum | Cout |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
The sum is 1 when an odd number of inputs are 1, which is XOR across all three. The carry out is 1 when at least two inputs are 1. As expressions, where + means OR:
Sum = A ⊕ B ⊕ CinCout = A·B + Cin·(A ⊕ B)
Another way to write the carry is A·B + A·Cin + B·Cin, the "majority" form: Cout is 1 whenever two or three inputs are 1. Both forms give the same truth table, which you can check with the Boolean algebra calculator.
Building a full adder from two half adders
The first half adder adds A and B. The second half adder adds that sum to Cin, which gives the final Sum. Each half adder can produce a carry, and an OR gate combines them into Cout. The two carries are never 1 at the same time, because the second half adder can only carry when the first sum is 1, and then the first carry is 0. That is why a plain OR is enough.
That makes a full adder five gates: two XOR, two AND and one OR. You can also build it from nine NAND gates and nothing else. This is possible because NAND is a universal gate: every other gate can be made from NAND gates alone.
Half adder vs full adder
| Half adder | Full adder | |
|---|---|---|
| Inputs | A, B | A, B, Cin |
| Outputs | Sum, Carry | Sum, Cout |
| Gates | 1 XOR, 1 AND | 2 XOR, 2 AND, 1 OR |
| Sum | A ⊕ B | A ⊕ B ⊕ Cin |
| Carry | A · B | A·B + Cin·(A ⊕ B) |
| Use | rightmost bit only | any bit of a multi-bit sum |
Ripple carry adder: adding whole numbers
To add two 4-bit numbers, line up four full adders, one per column. The carry out of each adder feeds the carry in of the adder to its left. The first adder's carry in is 0. Here is 0110 + 0111, which is 6 + 7:
| Adder | A | B | Cin | Sum | Cout |
|---|---|---|---|---|---|
| FA0 (bit 0) | 0 | 1 | 0 | 1 | 0 |
| FA1 (bit 1) | 1 | 1 | 0 | 0 | 1 |
| FA2 (bit 2) | 1 | 1 | 1 | 1 | 1 |
| FA3 (bit 3) | 0 | 0 | 1 | 1 | 0 |
Read the Sum column from the bottom row up and you get 1101, which is 13. You can confirm that in the binary to decimal converter. The last carry out is 0, so the answer fits in 4 bits. If it were 1, the sum would need a fifth bit. Try 1001 + 1100 (9 + 12): the answer is 21, or 10101, and a 4-bit register keeps only 0101. Losing that top bit is called an overflow.
The name comes from the way the carry moves: each adder has to wait for the carry from its right before its own output is final, so the carry ripples from right to left. In a 64-bit ripple adder the top bit waits for the carry to pass through the 63 adders below it, and every stage adds its own gate delay. That is too slow for a processor, so real chips use carry-lookahead adders and similar designs that work out the carries in parallel. Each column still does the same full-adder sum.
Subtracting with the same adder
The same chain of full adders can subtract. Put an XOR gate on each B input and connect the other input of every XOR to one control line. When the line is 0, each XOR passes its B bit through unchanged and the circuit adds. When the line is 1, each XOR flips its B bit. The same line also feeds the first carry in, which adds 1. Flipping the bits and adding 1 gives the two's complement of B, which is how binary writes -B, so the circuit now computes A - B. The binary subtraction guide works through that method by hand.
Where adders are used
- The arithmetic logic unit (ALU) in every processor, for addition, subtraction and address calculations.
- Counters and timers, which add 1 on every clock tick.
- Multipliers, which are built from rows of adders that add up shifted copies of a number.
- Checksums in network and storage hardware. IP, TCP and UDP use a one's complement sum with an end-around carry.
To watch column-by-column addition with every carry written out, put your own numbers into the binary calculator.
Questions people ask
What is the difference between a half adder and a full adder?
A half adder adds two bits and has no carry input. A full adder adds three bits, A, B and a carry in, so it can be chained to add numbers with many bits.
Which gates are used in a half adder?
One XOR gate for the sum and one AND gate for the carry.
How many gates are in a full adder?
Five in the usual design: two XOR, two AND and one OR. Built only from NAND gates, it takes nine.
What is the Boolean expression for a full adder?
Sum = A ⊕ B ⊕ Cin and Cout = A·B + Cin·(A ⊕ B), which can also be written A·B + A·Cin + B·Cin.
What is a ripple carry adder?
A chain of full adders, one per bit, where each carry out feeds the next carry in. It is simple, but the carry has to pass through every stage before the top bit is ready.
Can a full adder subtract?
Yes, with one extra XOR gate per bit. Invert B and set the first carry in to 1, and an adder computes A - B using two's complement.
About the authors
Zachary Painter is a technical writer at GitLab, where he writes developer documentation and UI text. He has written API documentation for REST and GraphQL APIs and reference docs for Kubernetes, Docker and command-line tools, earlier as a technical writer at Pomerium and a senior technical content writer at Stream. He holds a BA in English and German studies from the University of North Carolina at Greensboro. On binarytranslator.ai he writes guides and the how-to sections on tool pages.
Mehran Mozaffari Kermani is a professor at the Bellini College of Artificial Intelligence, Cybersecurity and Computing at the University of South Florida. His research covers computer arithmetic, cryptographic hardware and fault detection in digital circuits, and he worked as an ASIC design engineer at AMD before he joined academia. He earned his PhD in electrical and computer engineering at the University of Western Ontario, was a postdoctoral fellow at Princeton and is a senior member of IEEE. On binarytranslator.ai he reviews the logic gate, binary arithmetic and floating-point tools.
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